Session

Energy Efficiency Engineering

Description

Actually multi-core processors designs are limited in power consumption and performance. Consequently, it is not possible to optimize further the performance without increasing power consumption. The main challenge in multi-core processors is the fact that they have heterogeneous hardware components. This article will study different technologies for implementing multi-core processors in FPGA devices. The minimum requirement to ensure low power consumption is parallelism. The purpose of this study is to highlight the latest methodologies used in terms of environment, clock signal, testing, flexibility, cost, availability and power consumption.

Keywords:

processor, FPGA, soft-core, hard-core, power consumption

Session Chair

Peter P. Groumpos

Session Co-Chair

Robert Kosova

Proceedings Editor

Edmond Hajrizi

ISBN

978-9951-437-69-1

First Page

41

Last Page

46

Location

Pristina, Kosovo

Start Date

27-10-2018 9:00 AM

End Date

27-10-2018 10:30 AM

DOI

10.33107/ubt-ic.2018.151

Download

Included in

Engineering Commons

Share

COinS
 
Oct 27th, 9:00 AM Oct 27th, 10:30 AM

FPGA multi-core processors power consumption: soft- core vs. hard-core

Pristina, Kosovo

Actually multi-core processors designs are limited in power consumption and performance. Consequently, it is not possible to optimize further the performance without increasing power consumption. The main challenge in multi-core processors is the fact that they have heterogeneous hardware components. This article will study different technologies for implementing multi-core processors in FPGA devices. The minimum requirement to ensure low power consumption is parallelism. The purpose of this study is to highlight the latest methodologies used in terms of environment, clock signal, testing, flexibility, cost, availability and power consumption.