Session
Computer Science and Communication Engineering
Description
Pseudo Random Bit and Number Generator (PRB/NG) circuits being very widely used for security, compressive sensing and diverse other applications in telecommunications are studies in different aspects in the laboratory of Computer-aided Design in Telecommunications in Technical University-Sofia. Some results of this study are published in [1] where tests for randomness from the National Institute of Standards and Technology (NIST) suit are applied on commonly used PRB/NGs. Other aspects of the PRB/NG circuits study is their power consumption in the aim of green communications as noticed in [2,3] and the concern about low power consuming devices for Internet of Things’ (IoT) applications. A recent research, described in [4] has confirmed the strong influence of VHDL codes of a circuit design from a given specification and it’s illustrated for a 4-bit comparator circuit.
This paper considers power consumption estimation results for a set of PRB/NG circuits in the aim to add power consumption constraints at the design stage for such circuits and to help optimal design selection with minimal power consumption for a given application. The PRB/NG circuits are implemented on XILINX FPGA devices and they are simulated with the Power analyzer option of VIVADO tool and XPE. The approach proposed can be useful for other classes of communication circuits.
Session Chair
Edmond Jajaga
Session Co-Chair
Xhafer Krasniqi
Proceedings Editor
Edmond Hajrizi
ISBN
978-9951-437-60-8
First Page
33
Last Page
42
Location
Durres, Albania
Start Date
27-10-2017 4:15 PM
End Date
27-10-2017 6:00 PM
DOI
10.33107/ubt-ic.2017.84
Recommended Citation
Marinova, Galia, "Study of the Power Consumption of Pseudo Random Bit Generator Circuits Implemented on FPGA" (2017). UBT International Conference. 84.
https://knowledgecenter.ubt-uni.net/conference/2017/all-events/84
Included in
Study of the Power Consumption of Pseudo Random Bit Generator Circuits Implemented on FPGA
Durres, Albania
Pseudo Random Bit and Number Generator (PRB/NG) circuits being very widely used for security, compressive sensing and diverse other applications in telecommunications are studies in different aspects in the laboratory of Computer-aided Design in Telecommunications in Technical University-Sofia. Some results of this study are published in [1] where tests for randomness from the National Institute of Standards and Technology (NIST) suit are applied on commonly used PRB/NGs. Other aspects of the PRB/NG circuits study is their power consumption in the aim of green communications as noticed in [2,3] and the concern about low power consuming devices for Internet of Things’ (IoT) applications. A recent research, described in [4] has confirmed the strong influence of VHDL codes of a circuit design from a given specification and it’s illustrated for a 4-bit comparator circuit.
This paper considers power consumption estimation results for a set of PRB/NG circuits in the aim to add power consumption constraints at the design stage for such circuits and to help optimal design selection with minimal power consumption for a given application. The PRB/NG circuits are implemented on XILINX FPGA devices and they are simulated with the Power analyzer option of VIVADO tool and XPE. The approach proposed can be useful for other classes of communication circuits.